# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/soc/imx/fsl,imx93-src.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: NXP i.MX9 System Reset Controller

maintainers:
  - Peng Fan <peng.fan@nxp.com>

description: |
  The System Reset Controller (SRC) is responsible for the generation of
  all the system reset signals and boot argument latching.

  Its main functions are as follows,
  - Deals with all global system reset sources from other modules,
    and generates global system reset.
  - Responsible for power gating of MIXs (Slices) and their memory
    low power control.

properties:
  compatible:
    items:
      - const: fsl,imx93-src
      - const: syscon

  reg:
    maxItems: 1

  slice:
    type: object
    description: list of power domains provided by this controller.

    patternProperties:
      "power-domain@[0-9]$":
        type: object
        properties:

          '#power-domain-cells':
            const: 0

          reg:
            description: |
              Power domain index. Valid values are defined in
              include/dt-bindings/power/imx93-power.h for fsl,imx93-src
            maxItems: 1

          clocks:
            description: |
              A number of phandles to clocks that need to be enabled
              during domain power-up sequencing to ensure reset
              propagation into devices located inside this power domain.
            minItems: 1
            maxItems: 5

        required:
          - '#power-domain-cells'
          - reg

required:
  - compatible
  - reg
  - slice

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/imx93-clock.h>
    #include <dt-bindings/power/imx93-power.h>

    src@44460000 {
        compatible = "fsl,imx93-src", "syscon";
        reg = <0x44460000 0x10000>;

        slice {
                #address-cells = <1>;
                #size-cells = <0>;

                mediamix: power-domain@0 {
                        reg = <IMX93_POWER_DOMAIN_MEDIAMIX>;
                        #power-domain-cells = <0>;
                        clocks = <&clk IMX93_CLK_MEDIA_AXI>,
                                 <&clk IMX93_CLK_MEDIA_APB>;
                };
        };
    };
